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High-Level Synthesis for Accelerator Design: Current Trends and Emerging Directions
Hardware specialization is increasingly essential to meet the performance and energy demands of modern applications. High-level synthesis (HLS) has emerged as a key enabling technology, allowing designers to rapidly generate specialized accelerators while exploring complex trade-offs between computation, communication, and memory. Significant challenges remain, however, including the need to orchestrate efficient data movement across memory hierarchies, optimize communication architectures, and protect both data and intellectual property in accelerator design.
This talk will discuss how compiler optimizations, HLS, and hardware design techniques can be combined to address these challenges. I will first discuss current trends, including the growing integration of HLS into heterogeneous system design, advances in communication and memory optimization, and the increasing role of hardware-level security. I will then highlight emerging directions, including the use of large language models to support hardware design automation and the integration of HLS into fully open-source EDA tool flows.
Prof. Christian Pilato
Christian Pilato is an Associate Professor at Politecnico di Milano. He received his Ph.D. in Information Technology from Politecnico di Milano in 2011. He has been a Postdoctoral Researcher at Columbia University and the University of Lugano, and a Visiting Researcher at New York University, TU Delft, and Chalmers University of Technology.